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  hexfet   power mosfet benefits  improved gate, avalanche and dynamic dv/dt ruggedness  fully characterized capacitance and avalanche soa  enhanced body diode dv/dt and di/dt capability  lead-free gds gate drain source fig 1. typical on-resistance vs. gate voltage fig 2. maximum drain current vs. case temperature applications  brushed motor drive applications  bldc motor drive applications  battery powered circuits  half-bridge and full-bridge topologies  synchronous rectifier applications  resonant mode power supplies  or-ing and redundant power switches  dc/dc and ac/dc converters  dc/ac inverters 2 4 6 8 10 12 14 16 18 20 v gs, gate -to -source voltage (v) 0 1 2 3 4 5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ) i d = 100a t j = 25c t j = 125c d s g 
  
     d s g d 2 pak irfs7434pbf s d g d to-262 irfsl7434pbf 25 50 75 100 125 150 175 t c , case temperature (c) 0 50 100 150 200 250 300 350 i d , d r a i n c u r r e n t ( a ) limited by package ordering information form quantity irfsl7434pbf to-262 tube 50 irfsl7434pbf tube 50 irfs7434pbf tape and reel left 800 irfs7434trlpbf base part number package type standard pack complete part number d2pak irfs7434pbf  
    
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 "#  v dss 40v r ds(on) typ. 1.25m max. 1.6m i d (silicon limited) 320a i d (package limited) 195a
 
 
      
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 "#     calculated continuous current based on maximum allowable junction temperature. bond wire current limit is 195a 
  
  . note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. 

   repetitive rating; pulse width limited by max. junction temperature.   limited by t jmax , starting t j = 25c, l = 0.099mh r g = 50 , i as = 100a, v gs =10v.  i sd 100a, di/dt 1307a/ s, v dd v (br)dss , t j 175c.   pulse width 400 s; duty cycle 2%.   c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss .  c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss .   

   
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 limited by t jmax starting t j = 25c, l= 1mh, r g = 50 , i as = 47a, v gs =10v.  when mounted on 1" square pcb (fr-4 or g-10 material). please refer to an-994 for more details: http://www.irf.com/technical-info/appnotes/an-994.pdf ?  %
   
   
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 $ absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 25c continuous drain current, v gs @ 10v (wire bond limited) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v dv/dt peak diode recovery  v/ns t j operating junction and t st g storage temperature range soldering temperature, for 10 seconds (1.6mm from case) avalanche characteristics e as (thermally limited) single pulse avalanche energy mj e as (thermally limited) single pulse avalanche energy  i ar avalanche current  a e ar repetitive avalanche energy  mj thermal resistance symbol parameter typ. max. units r jc junction-to-case  ??? 0.5 r  ??? 40 c/w max. 320  226  1270 * 195 1098 -55 to + 175 20 1.96 see fig. 14, 15 , 22a, 22b a c 300 490 294 5.0 static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 40 ??? ??? v v (br)dss / t j breakdown voltage temp. coefficient ??? 32 ??? mv/c r ds(on) static drain-to-source on-resistance ??? 1.25 1.6 m 1.8 ??? m v gs(th) gate threshold voltage 2.2 3.0 3.9 v i dss drain-to-source leakage current ??? ??? 1.0 ??? ??? 150 i gss gate-to-source forward leakage ??? ??? 100 gate-to-source reverse leakage ??? ??? -100 r g internal gate resistance ??? 2.1 ??? conditions v gs = 0v, i d = 250 a reference to 25c, i d = 5ma v gs = 10v, i d = 100a  v gs = 6.0v, i d = 50a  v ds = v gs , i d = 250 a a na v ds = 40v, v gs = 0v v ds = 40v, v gs = 0v, t j = 125c v gs = 20v v gs = -20v
 
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 "#  s d g dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units gfs forward transconductance 211 ??? ??? s q g total gate charge ??? 216 324 q gs gate-to-source charge ??? 51 ??? q gd gate-to-drain ("miller") charge ??? 77 ??? q sync total gate charge sync. (q g - q gd ) ??? 139 ??? t d(on) turn-on delay time ??? 24 ??? t r rise time ??? 68 ??? t d(off) turn-off delay time ??? 115 ??? t f fall time ??? 68 ??? c is s input capacitance ??? 10820 ??? c os s output capacitance ??? 1540 ??? c rss reverse transfer capacitance ??? 1140 ??? c os s eff. (er) effective output capacitance (energy related) ??? 1880 ??? c os s eff. (tr) effective output capacitance (time related) ??? 2208 ??? diode characteristics symbol parameter min. typ. max. units i s continuous source current (body diode) i sm pulsed source current (body diode)  v sd diode forward voltage ??? 0.9 1.3 v dv/dt peak diode recovery  ??? 5.0 ??? v/ns t rr reverse recovery time ??? 38 ??? t j = 25c v r = 34v, ???37??? t j = 125c i f = 100a q rr reverse recovery charge ??? 50 ??? t j = 25c di/dt = 100a/ s  ???50??? t j = 125c i rrm reverse recovery current ??? 1.9 ??? a t j = 25c t j = 175c, i s = 100a, v ds = 40v conditions v ds = 10v, i d = 100a i d = 100a v ds =20v v gs = 10v v dd = 20v i d = 100a, v ds =0v, v gs = 10v t j = 25c, i s = 100a, v gs = 0v  integral reverse p-n junction diode. mosfet symbol showing the i d = 30a r g = 2.7 conditions v gs = 10v v gs = 0v nc ns pf v ds = 25v ? = 1.0 mhz, see fig. 5 v gs = 0v, v ds = 0v to 32v  , see fig. 12 v gs = 0v, v ds = 0v to 32v  a ns nc 320  ??? ??? ??? ??? 1270*
 
 
      
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 "#   fig 3. typical output characteristics fig 5. typical transfer characteristics fig 6. normalized on-resistance vs. temperature fig 4. typical output characteristics fig 8. typical gate charge vs. gate-to-source voltage fig 7. typical capacitance vs. drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 60 s pulse width tj = 25c 4.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 60 s pulse width tj = 175c vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 2 4 6 8 10 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 10v 60 s pulse width -60 -20 20 60 100 140 180 t j , junction temperature (c) 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 100a v gs = 10v 0 50 100 150 200 250 300 q g , total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 32v v ds = 20v i d = 100a 0.1 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 1000000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss
 
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 "#  fig 10. maximum safe operating area fig 11. drain-to-source breakdown voltage fig 9. typical source-drain diode forward voltage fig 12. typical c oss stored energy fig 13. typical on-resistance vs. drain current 0.0 0.5 1.0 1.5 2.0 2.5 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 10msec 1msec operation in this area limited by r ds (on) 100 sec dc limited by package 0 100 200 300 400 500 i d , drain current (a) 0.0 5.0 10.0 15.0 20.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ) vgs = 7.0v vgs = 8.0v vgs = 10v v gs = 6.0v v gs = 5.5v -60 -20 20 60 100 140 180 t j , temperature ( c ) 40 41 42 43 44 45 46 47 48 49 50 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) id = 5.0ma 0 5 10 15 20 25 30 35 40 45 v ds, drain-to-source voltage (v) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 e n e r g y ( j ) v ds = 0v to 32v
 
 
      
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 "#  & fig 13. maximum effective transient thermal impedance, junction-to-case fig 14. avalanche current vs.pulse width fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 22a, 22b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) =   t/ z thjc i av = 2  t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) c / w 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. allowed avalanche current vs avalanche pulsewidth, tav, assuming tj = 150c and tstart =25c (single pulse) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 100 200 300 400 500 600 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1.0% duty cycle i d = 100a
 
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 "#   ( )*+  !* , !   - fig 16. threshold voltage vs. temperature  ( )*+   ,. !   - 
( )*+  !* , !   -  ( )*+   ,. !   - -75 -25 25 75 125 175 225 t j , temperature ( c ) 0.5 1.5 2.5 3.5 4.5 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) id = 250 a id = 1.0ma id = 1.0a 0 200 400 600 800 1000 di f /dt (a/ s) 0 2 4 6 8 10 i r r m ( a ) i f = 60a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 2 4 6 8 10 i r r m ( a ) i f = 100a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 40 60 80 100 120 140 160 180 200 220 240 q r r ( n c ) i f = 60a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 40 80 120 160 200 q r r ( n c ) i f = 100a v r = 34v t j = 25c t j = 125c
 
 
      
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 "#  / fig 23a. switching time test circuit fig 23b. switching time waveforms fig 22b. unclamped inductive waveforms fig 22a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 24a. gate charge test circuit fig 24b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 21. 0    !* !- ) , for n-channel hexfet  power mosfets  
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         p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period 1 (  )*(+ +
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   d.u.t. v ds i d i g 3ma v gs .3 f 50k .2 f 12v current regulator same type as d.u.t. current sampling resistors + - v ds 90% 10% v gs t d(on) t r t d(off) t f (  ( ) 1 *  %   0.1 %   (    -$.$$ ( + - (  ( 
 
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  dat e code ye ar 0 = 2000 week 02 a = assembly site code r e ct if ie r int e rnat ional part number p = designates lead - free product (optional) f 530s in the assembly line "l" as s e mb led on ww 02, 2000 t his is an irf530s wit h lot code 8024 int ernat ional logo rectifier lot code assembly year 0 = 2000 part number dat e code line l week 02 or f 530s logo as s e mb l y lot code  
         
    
 
 
      
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 "#   to-262 part marking information to-262 package outline dimensions are shown in millimeters (inches) logo rectifier int e rnat ional lot code as s e mb l y logo rectifier int e rnat ional dat e code wee k 19 ye ar 7 = 1997 part number a = as s e mb l y s it e cod e or produ ct (opt ional) p = d e s ign at e s l e ad -f r e e e xample : t his is an irl3103l lot code 1789 as s e mb l y part number dat e code wee k 19 line c lot code year 7 = 1997 as s e mb le d on ww 19, 1997 in t h e as s e mb ly l ine "c"  
         
    
 
  
    
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 ! dimensions are shown in millimeters (inches) 3 4 4 trr feed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl feed direction 10.90 (.429) 10.70 (.421) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.063) 1.50 (.059) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362) min. 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge.
 
 
      
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 "#   2 3           4   5 http://www.irf.com/product-info/reliability 22 6++ !   788,    
  +   d 2 pak ms l 1 to-262 n/a rohs c ompliant moisture sensitivity level yes (per jedec jesd47f )?? qualification information ? industrial qualification level ir world headquarters: 101 n. sepulveda blvd., el segundo, california 90245, usa to contact international rectifier, please visit http://www.irf.com/whoto-call/ revision history date comment ? updated e as (l =1mh) = 1098mj on page 2 ? updated note 9 ?limited by t jmax , starting t j = 25c, l = 1mh, r g = 50 , i as = 47a, v gs =10v?. on page 2 ? 10. 11101


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